Monday, February 4, 2019

Compiler and Hardware Design for In-Memory and Near-Memory Acceleration of Cognitive Applications


(Sitao Huang, Vikram Sharma Mailthody, Zaid Qureshi- Presenting Wed. 2/6 at 2PM ET)

The increasing deployment of machine learning for applications such as image analytics and search has resulted in a number of special purpose accelerators in this domain. In this talk, we present two of our recent works. The first work is a compiler that optimizes the mapping of the computation graph for efficient execution in a memristor-based hybrid (analog-digital) deep learning accelerator. By building the compiler, we have made special purpose accelerators more accessible to software developers, and enabled the generation of better-performing executables. In our second work, we are exploring near-memory accelerations for applications like image retrieval. These applications are constrained by the bandwidth available to accelerators like GPUs, which could potentially benefit from near-memory processing.